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| author | Test_User <hax@andrewyu.org> | 2022-11-14 20:18:34 -0500 |
|---|---|---|
| committer | Test_User <hax@andrewyu.org> | 2022-11-14 20:18:34 -0500 |
| commit | 724b2654fb10fa40cf9053d96012e860cf24623d (patch) | |
| tree | c18ebe09f0a821736e8955649b320989400ed6cd /cpu/registers | |
| parent | 727cda594d942f310180cda48ae04c5e3ee9a0ff (diff) | |
| download | specification-724b2654fb10fa40cf9053d96012e860cf24623d.tar.gz specification-724b2654fb10fa40cf9053d96012e860cf24623d.zip | |
Added incomplete instruction set overview, fixed some other stuff
Diffstat (limited to '')
| -rw-r--r-- | cpu/registers/config.txt | 2 | ||||
| -rw-r--r-- | cpu/registers/interrupt-related.txt | 2 |
2 files changed, 2 insertions, 2 deletions
diff --git a/cpu/registers/config.txt b/cpu/registers/config.txt index 2be32a1..d32a47e 100644 --- a/cpu/registers/config.txt +++ b/cpu/registers/config.txt @@ -5,7 +5,7 @@ MR (Mode Register) On read Gives supported modes - If ((1 << ([desired mode in bytes] - 1)) & cr0) != 0, then it is supported + If ((1 << ([desired mode in bytes] - 1)) & MR) != 0, then it is supported Support for 16-bit mode, 64-bit mode, 128-bit mode, and 256 bit mode would be represented as 111010b diff --git a/cpu/registers/interrupt-related.txt b/cpu/registers/interrupt-related.txt index dd4b0b8..62376e3 100644 --- a/cpu/registers/interrupt-related.txt +++ b/cpu/registers/interrupt-related.txt @@ -10,7 +10,7 @@ OIPE (Old Instruction Pointer [Exception]) OPRE (Old Privilege Register [Exception]) Used to store the old PR when (non-double) exceptions occur -OIPDE (Old Instriction Pointer [Double Exception]) +OIPDE (Old Instruction Pointer [Double Exception]) Used to store the old IP when double exceptions occur OPRDE (Old Privilege Register [Double Exception]) |