Commit message (Expand) | Author | Files | Lines | |
---|---|---|---|---|
2023-02-15 | Add more instructions | Test_User | 7 | -0/+74 |
2023-02-13 | Rewrite/improve conditional instructions | Test_User | 4 | -46/+26 |
2023-01-21 | All general-purpose registers can be used for integer arithmatic or floating-... | Test_User | 1 | -11/+6 |
2023-01-05 | Add hardware task switching, get rid of software interrupts | Test_User | 11 | -34/+103 |
2023-01-03 | more segments, fewer addresses (and 64-bit mode is outgrown... use 128-bit mode) | Test_User | 1 | -6/+6 |
2022-11-22 | Started listing instructions, improved cpu readability of format A a little | Test_User | 6 | -2/+73 |
2022-11-17 | More VLIW format ideas | Test_User | 1 | -1/+19 |
2022-11-16 | Dynamic VLIW definition continued, fixed another missing thing | Test_User | 2 | -0/+10 |
2022-11-14 | Added incomplete instruction set overview, fixed some other stuff | Test_User | 7 | -6/+48 |
2022-10-08 | added basics for exceptions (incomplete) | Test_User | 5 | -9/+54 |