From 724b2654fb10fa40cf9053d96012e860cf24623d Mon Sep 17 00:00:00 2001 From: Test_User Date: Mon, 14 Nov 2022 20:18:34 -0500 Subject: Added incomplete instruction set overview, fixed some other stuff --- cpu/instructions/overview.txt | 41 +++++++++++++++++++++++++++++++++++++++++ 1 file changed, 41 insertions(+) create mode 100644 cpu/instructions/overview.txt (limited to 'cpu/instructions') diff --git a/cpu/instructions/overview.txt b/cpu/instructions/overview.txt new file mode 100644 index 0000000..95b0034 --- /dev/null +++ b/cpu/instructions/overview.txt @@ -0,0 +1,41 @@ +Dynamic VLIW + Allows a dynamic number of instructions to be queued for simultaneous execution + + All inputs within the same queue will be calculated before outputs + `mov R0, R1` and `mov R1, R0` put into the same queue will result in swapping R0 and R1 + + If any exception occurs during the execution of the queued instructions, all output will be discarded + If multiple exceptions would have theoretically occurred, which one is triggered is undefined + + Current format ideas: + A) + effects: + uses space efficiently when using many repetitions of the same opcodes + easier for the CPU to parse + + requires all parameter lengths to be the same within the opcode + wastes space when few repetitions of the same opcode exists + + format: + num_opcodes + for each: + opcode + num_instructions + for each: + parameters + size_of_immediate_references + for each: + value + + B) + effects: + allows variable length parameters + + harder for the CPU to parse + + format: + size_of_queue + for each instruction: + opcode + parameters + immediate references -- cgit v1.2.3