From 0d290b91117fb0002e247b7a48a38eb40fc48fbd Mon Sep 17 00:00:00 2001 From: Test_User Date: Thu, 5 Jan 2023 03:29:26 -0500 Subject: Add hardware task switching, get rid of software interrupts --- cpu/task_switching/execution.txt | 66 ++++++++++++++++++++++++++++++++++++++++ cpu/task_switching/tdt.txt | 23 ++++++++++++++ 2 files changed, 89 insertions(+) create mode 100644 cpu/task_switching/execution.txt create mode 100644 cpu/task_switching/tdt.txt (limited to 'cpu/task_switching') diff --git a/cpu/task_switching/execution.txt b/cpu/task_switching/execution.txt new file mode 100644 index 0000000..63a9126 --- /dev/null +++ b/cpu/task_switching/execution.txt @@ -0,0 +1,66 @@ +All task switches will occur after the current instructions in the queue have finished being processed and written + Will not conflict with other writes within the same instruction queue + Triggers exception if multiple task switches occur within the same instruction queue + +TODO: mark current CPU executing it + +Call process: + Only allowed to be used by the original process + Triggers exception otherwise + + Custom ID must match between the tdt at the index and the one specified by the instruction, and the target must be marked as valid + TODO: trigger exception? set a flag? + + One segment may be passed to the callee, used by the callee with all segment bits set + Caller may call with all segment bits set to not pass a segment + + Current process id in the tdt will be set to the id of the callee + Current segments will be saved to the tdt, and those of the callee will be loaded + PR as specified in the callee's tdt for the callable segment will be loaded, and current PR is saved to the tdt + IP of next instruction is saved to tdt + Stack pointers are saved to tdt + + Jumps to , offset 0 + +Return process: + Only allowed to be used by the callee + Triggers exception otherwise + + Segments will be loaded from the tdt + Process id in the tdt is set to the original process's id + Stack pointers are loaded from the tdt + PR is loaded from the tdt + + IP is loaded from the tdt + +Switch process: + Only allowed to be used by the original process + Triggers exception otherwise + + Only allowed to switch to a process that is not currently active + TODO: trigger exception? set a flag? + + Custom ID must match between the tdt at the index and the one specified by the instruction, and the target must be marked as valid + TODO: trigger exception? set a flag? + + All registers are saved to the current tdt and loaded from the target's tdt index + + Loads all registers from the target's tdt index + +Switch process and exit exception/interrupt handler: + Only allowed to be used while in an exception/interrupt handler (TODO: different opcode for each?) + Triggers exception otherwise + + Only allowed to switch to a process that is not currently active + TODO: trigger exception? set a flag? + + Only allowed to switch to a process that is valid + TODO: trigger exception? set a flag? + + All registers are saved to the current tdt and loaded from the target's tdt index + IP and PR are saved as if all exception/interrupt handlers returned + This saving step will be skipped if the entry for the current process is not flagged as valid + + Allows more interrupts to be processed + + Loads all registers from the target's tdt index diff --git a/cpu/task_switching/tdt.txt b/cpu/task_switching/tdt.txt new file mode 100644 index 0000000..d7c7858 --- /dev/null +++ b/cpu/task_switching/tdt.txt @@ -0,0 +1,23 @@ +Each entry is n*(5 + number_of_registers) bits long, where n is the current mode in bits + +Each entry uses the following format: + width: same number of bits as current mode + (higher address) + +----------------------------------------------------------------------------------+ + | array of register's contents on last switch | + +-----------------------------------+----------------------------------------------+ + | upper 1/2: number of segments | lower 1/2: pointer to segments | + +-----------------------------------+----------------------------------------------+ + | upper 1/2: callable segment index | lower 1/2: current process being executed as | + +-----------------------------------+----------------------------------------------+ + | PR to be used when called | + +----------------------------------------------------------------------------------+ + | reserved for specifying where it's being executed | + +-----------------------------------+---------------------+------------------------+ + | upper 1/2: custom id | n bits below: flags | remaining: unused | + +-----------------------------------+---------------------+------------------------+ + (lower address) + +Flags: + 0: Valid + 1: Currently running -- cgit v1.2.3