Add hardware task switching, get rid of software interrupts

11 files changed, 103 insertions, 34 deletions

diff --git a/cpu/access_control/gdt.txt b/cpu/access_control/gdt.txt
index c803ace..cd4ca6d 100644
--- a/cpu/access_control/gdt.txt
+++ b/cpu/access_control/gdt.txt
@@ -1,7 +1,7 @@
 Each entry is n*4 bits long, where n is the current mode in bits
-TODO: Specify a limit for them
 
-It uses the following format:
+Each entry uses the following format:
+	width: same number of bits as current mode
 	(higher address)
 	+---------------------+-------------------------+
 	| upper 4 bits: flags | lower 1/2: base address |
diff --git a/cpu/interrupts/exceptions/edt.txt b/cpu/exceptions/edt.txt
index f1f5792..f1f5792 100644
--- a/cpu/interrupts/exceptions/edt.txt
+++ b/cpu/exceptions/edt.txt
diff --git a/cpu/interrupts/exceptions/execution.txt b/cpu/exceptions/execution.txt
index dbf8825..17ca927 100644
--- a/cpu/interrupts/exceptions/execution.txt
+++ b/cpu/exceptions/execution.txt
@@ -3,8 +3,8 @@ For non-double exceptions:
 	OIPE gets set to the IP from the previous code running
 	PR is set to all 1s
 
-	Hardware interrupts will not occur until after the current processing has been finished via `irete`
-	Any exceptions that occur before `irete` will trigger a double exception instead of the normal one
+	Interrupts will not occur until after the current processing has been finished via `irete`, or an appropriate task switch occurs
+	Any exception that occurs before `irete`, or an appropriate task switch, will trigger a double exception instead of the normal one
 
 	When returning via irete:
 		PR is set to OPRE
diff --git a/cpu/features/all.txt b/cpu/features/all.txt
index 14f5795..e69de29 100644
--- a/cpu/features/all.txt
+++ b/cpu/features/all.txt
@@ -1 +0,0 @@
-Hardware task switching
diff --git a/cpu/interrupts/execution.txt b/cpu/interrupts/execution.txt
new file mode 100644
index 0000000..858334c
--- /dev/null
+++ b/cpu/interrupts/execution.txt
@@ -0,0 +1,10 @@
+When an interrupt occurs:
+	OPRI gets set to the PR from the previous code running
+	OIPI gets set to the IP from the previous code running
+	PR is set to all 1s
+
+The next interrupt will not occur until after the current processing has been finished via `ireti`
+
+When returning via ireth:
+	PR is set to OPRI
+	Execution jumps to OIPI
diff --git a/cpu/interrupts/hardware/execution.txt b/cpu/interrupts/hardware/execution.txt
deleted file mode 100644
index 1644994..0000000
--- a/cpu/interrupts/hardware/execution.txt
+++ /dev/null
@@ -1,10 +0,0 @@
-When a hardware interrupt occurs:
-	OPRH gets set to the PR from the previous code running
-	OIPH gets set to the IP from the previous code running
-	PR is set to all 1s
-
-The next hardware interrupt will not occur until after the current processing has been finished via `ireth`
-
-When returning via ireth:
-	PR is set to OPRH
-	Execution jumps to OIPH
diff --git a/cpu/interrupts/hardware/irqt.txt b/cpu/interrupts/irqt.txt
index f1f5792..f1f5792 100644
--- a/cpu/interrupts/hardware/irqt.txt
+++ b/cpu/interrupts/irqt.txt
diff --git a/cpu/interrupts/software/execution.txt b/cpu/interrupts/software/execution.txt
deleted file mode 100644
index 0cad31b..0000000
--- a/cpu/interrupts/software/execution.txt
+++ /dev/null
@@ -1,8 +0,0 @@
-When calling a software interrupt:
-	R0 gets overwritten with the current PR
-	R1 gets overwritten with a pointer of the same segment as IP, pointing to the next instruction
-	PR is set to all 1s
-
-When returning via iretp:
-	PR is set to R0
-	Execution jumps to R1
diff --git a/cpu/interrupts/software/idt.txt b/cpu/interrupts/software/idt.txt
deleted file mode 100644
index 7488808..0000000
--- a/cpu/interrupts/software/idt.txt
+++ /dev/null
@@ -1,11 +0,0 @@
-Each entry is n*2 bits long, where n is the current mode in bits
-TODO: Specify a limit for them
-
-It uses the following format:
-	(higher address)
-	+--------------------------------+
-	| Pointer to executable code run |
-	+--------------------------------+
-	| Privileges required for usage  |
-	+--------------------------------+
-	(lower address)
diff --git a/cpu/task_switching/execution.txt b/cpu/task_switching/execution.txt
new file mode 100644
index 0000000..63a9126
--- /dev/null
+++ b/cpu/task_switching/execution.txt
@@ -0,0 +1,66 @@
+All task switches will occur after the current instructions in the queue have finished being processed and written
+	Will not conflict with other writes within the same instruction queue
+	Triggers <TODO> exception if multiple task switches occur within the same instruction queue
+
+TODO: mark current CPU executing it
+
+Call process:
+	Only allowed to be used by the original process
+		Triggers <TODO> exception otherwise
+
+	Custom ID must match between the tdt at the index and the one specified by the instruction, and the target must be marked as valid
+		TODO: trigger exception? set a flag?
+
+	One segment may be passed to the callee, used by the callee with all segment bits set
+		Caller may call with all segment bits set to not pass a segment
+
+	Current process id in the tdt will be set to the id of the callee
+	Current segments will be saved to the tdt, and those of the callee will be loaded
+	PR as specified in the callee's tdt for the callable segment will be loaded, and current PR is saved to the tdt
+	IP of next instruction is saved to tdt
+	Stack pointers are saved to tdt
+
+	Jumps to <callee's callable segment>, offset 0
+
+Return process:
+	Only allowed to be used by the callee
+		Triggers <TODO> exception otherwise
+
+	Segments will be loaded from the tdt
+	Process id in the tdt is set to the original process's id
+	Stack pointers are loaded from the tdt
+	PR is loaded from the tdt
+
+	IP is loaded from the tdt
+
+Switch process:
+	Only allowed to be used by the original process
+		Triggers <TODO> exception otherwise
+
+	Only allowed to switch to a process that is not currently active
+		TODO: trigger exception? set a flag?
+
+	Custom ID must match between the tdt at the index and the one specified by the instruction, and the target must be marked as valid
+		TODO: trigger exception? set a flag?
+
+	All registers are saved to the current tdt and loaded from the target's tdt index
+
+	Loads all registers from the target's tdt index
+
+Switch process and exit exception/interrupt handler:
+	Only allowed to be used while in an exception/interrupt handler (TODO: different opcode for each?)
+		Triggers <TODO> exception otherwise
+
+	Only allowed to switch to a process that is not currently active
+		TODO: trigger exception? set a flag?
+
+	Only allowed to switch to a process that is valid
+		TODO: trigger exception? set a flag?
+
+	All registers are saved to the current tdt and loaded from the target's tdt index
+		IP and PR are saved as if all exception/interrupt handlers returned
+		This saving step will be skipped if the entry for the current process is not flagged as valid
+
+	Allows more interrupts to be processed
+
+	Loads all registers from the target's tdt index
diff --git a/cpu/task_switching/tdt.txt b/cpu/task_switching/tdt.txt
new file mode 100644
index 0000000..d7c7858
--- /dev/null
+++ b/cpu/task_switching/tdt.txt
@@ -0,0 +1,23 @@
+Each entry is n*(5 + number_of_registers) bits long, where n is the current mode in bits
+
+Each entry uses the following format:
+	width: same number of bits as current mode
+	(higher address)
+	+----------------------------------------------------------------------------------+
+	| array of register's contents on last switch                                      |
+	+-----------------------------------+----------------------------------------------+
+	| upper 1/2: number of segments     | lower 1/2: pointer to segments               |
+	+-----------------------------------+----------------------------------------------+
+	| upper 1/2: callable segment index | lower 1/2: current process being executed as |
+	+-----------------------------------+----------------------------------------------+
+	| PR to be used when called                                                        |
+	+----------------------------------------------------------------------------------+
+	| reserved for specifying where it's being executed                                |
+	+-----------------------------------+---------------------+------------------------+
+	| upper 1/2: custom id              | n bits below: flags | remaining: unused      |
+	+-----------------------------------+---------------------+------------------------+
+	(lower address)
+
+Flags:
+	0: Valid
+	1: Currently running