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authorTest_User <hax@andrewyu.org>2023-06-12 23:16:50 -0400
committerTest_User <hax@andrewyu.org>2023-06-12 23:16:50 -0400
commit6efc740c4be65bdb7e9d1067d0f4137954732a10 (patch)
tree4ea932e7ba3caedb39ae5b59c3c965a24d2175c1
parent0f59e6543707830d06a94ac8a9ad6b795530cfb9 (diff)
downloadspecification-6efc740c4be65bdb7e9d1067d0f4137954732a10.tar.gz
specification-6efc740c4be65bdb7e9d1067d0f4137954732a10.zip
Change instruction format a bit, continue assembler writing
-rw-r--r--cpu/instructions/overview.txt10
1 files changed, 5 insertions, 5 deletions
diff --git a/cpu/instructions/overview.txt b/cpu/instructions/overview.txt
index 934aa62..2730593 100644
--- a/cpu/instructions/overview.txt
+++ b/cpu/instructions/overview.txt
@@ -21,18 +21,18 @@ Dynamic VLIW
size_of_instructions
for each:
opcode
- num_parameters
- for each:
+ num_instructions
+ for each * params per instruction:
value
size_of_immediate_references
for each:
value
- size_of_flag_save_definitions
+ num_flag_save_definitions
for each:
instruction index in queue
- which flags to save
+ which flags to save (1 bit per flag type available)
where to save them
- bitwise offset in the destination
+ bitwise offset in the destination (log2(bits_for_current_mode) bits)
A minimum of <n> instructions per queue must be accepted by all CPUs
TODO: define n