Make conditional stuff work nicely

3 files changed, 32 insertions, 78 deletions

diff --git a/cpu/instructions/conditions/save_condition.txt b/cpu/instructions/conditions/save_condition.txt
deleted file mode 100644
index a7df9d2..0000000
--- a/cpu/instructions/conditions/save_condition.txt
+++ /dev/null
@@ -1,18 +0,0 @@
-Number of parameters:
-
-Usage:
-	save_condition <output> <offset> <conditional parameter>
-
-conditional parameter: same as is_conditional from ../opcode.txt, but with the following changes:
-	Values to be compared are instead xor'd
-
-Effect:
-	Saves the selected flags to <output> at bitwise position <offset>
-		Flags are xor'd with the comparison value
-		Resulting value is shifted down to not have gaps from unused flags
-
-Exceptions:
-	None
-
-Notes:
-	Will be executed in the conditional phase
diff --git a/cpu/instructions/opcode.txt b/cpu/instructions/opcode.txt
index d69eda4..f43f58a 100644
--- a/cpu/instructions/opcode.txt
+++ b/cpu/instructions/opcode.txt
@@ -3,15 +3,20 @@ Binary format:
 
 
 is_conditional:
-	Appends 1 parameter to the normal parameter list for the instruction:
-		Lowest 3 bits: flags for each of the following checked, from lowest to highest:
-			Zero
-			Overflow
-			Carry
-		Next 3 bits:
-			Value for each of the above that it should match
-		Remaining bits:
-			Index into instruction queue for which result is to be compared
+	n: number of bits for current mode
+	s: minimum number of bits required to represent n-1
+	/: integer division
+
+	Appends 2 parameters to the normal parameter list for the instruction:
+		First parameter:
+			Lowest (n-s)/2 bits:
+				Which bits to check
+			Next (n-s)/2 bits:
+				Value for each of the above that it should match
+			Remaining bits:
+				Bitwise offset into second parameter for value to be used
+		Second parameter:
+			Value to be used
 
 	Conditional instructions will be executed after unconditional ones
 
diff --git a/cpu/instructions/overview.txt b/cpu/instructions/overview.txt
index 1c945fb..205f382 100644
--- a/cpu/instructions/overview.txt
+++ b/cpu/instructions/overview.txt
@@ -9,63 +9,30 @@ Dynamic VLIW
 	If multiple exceptions would have theoretically occurred, which one is triggered is undefined
 
 	If outputs from multiple instructions overlap:
-		Conditional instructions will be preferred above all others
+		Flag saving will always take priority
+		Conditional instructions will be preferred above all other instructions
 		Indirect writes, such as `jmp` and `push`, will be preferred over direct writes
 
 		If a conflict still remains, which value will be written to the overlapping area is undefined
 
 		If an exception would be generated by attempting to write one value there but not the other, the exception might not occur if the other value is what is written
 
-	Current format ideas:
-		A)
-			effects:
-				uses space efficiently when using many repetitions of the same opcodes
-				allows reuse of immediate references
-				easier for the CPU to parse
-
-				requires all parameter lengths to be the same within the opcode
-				wastes space when few repetitions of the same opcode exists and immediate references are rarely reused
-
-			format:
-				num_opcodes
-				for each:
-					opcode
-					num_parameters
-					for each:
-						value
-				size_of_immediate_references
-				for each:
-					value
-
-		B) 
-			effects:
-				allows variable length parameters
-
-				harder for the CPU to parse
-
-			format:
-				size_of_queue
-				for each instruction:
-					opcode
-					parameters
-					immediate references
-
-		C)
-			effects:
-				allows variable length parameters
-				allows reuse of immediate references
-
-				harder for the CPU to parse
-				larger if immediate references are not reused
-
-			format:
-				size_of_instructions
-				for each instruction:
-					opcode
-					parameters
-				size_of_immediate_references
-				for each:
-					value
+	Format:
+		size_of_instructions
+		for each:
+			opcode
+			num_parameters
+			for each:
+				value
+		size_of_immediate_references
+		for each:
+			value
+		size_of_flag_save_definitions
+		for each:
+			instruction index in queue
+			which flags to save
+			where to save them
+			bitwise offset in the destination
 
 	A minimum of <n> instructions must be accepted by all CPUs
 		TODO: define n