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author | Test_User <hax@andrewyu.org> | 2023-02-13 20:17:31 -0500 |
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committer | Test_User <hax@andrewyu.org> | 2023-02-13 20:17:31 -0500 |
commit | 22029d37cbf391a35304d32778bd01ecf40de482 (patch) | |
tree | 3e7a89a00280a181ea4742c7ce4387bad9a32a3d /cpu/instructions/opcode.txt | |
parent | e46a052aade6e343fb8482fff9183589bbbfad8d (diff) | |
download | specification-22029d37cbf391a35304d32778bd01ecf40de482.tar.gz specification-22029d37cbf391a35304d32778bd01ecf40de482.zip |
Rewrite/improve conditional instructions
Diffstat (limited to 'cpu/instructions/opcode.txt')
-rw-r--r-- | cpu/instructions/opcode.txt | 18 |
1 files changed, 18 insertions, 0 deletions
diff --git a/cpu/instructions/opcode.txt b/cpu/instructions/opcode.txt new file mode 100644 index 0000000..d69eda4 --- /dev/null +++ b/cpu/instructions/opcode.txt @@ -0,0 +1,18 @@ +Binary format: + is_conditional[1], instruction id[remaining bits] + + +is_conditional: + Appends 1 parameter to the normal parameter list for the instruction: + Lowest 3 bits: flags for each of the following checked, from lowest to highest: + Zero + Overflow + Carry + Next 3 bits: + Value for each of the above that it should match + Remaining bits: + Index into instruction queue for which result is to be compared + + Conditional instructions will be executed after unconditional ones + + Conditional instructions will never set flags, if a conditional instruction references another, it will always be based on null flags |