diff options
| -rw-r--r-- | cpu/access_control/addressing.txt | 8 | ||||
| -rw-r--r-- | cpu/registers/pointers.txt | 6 |
2 files changed, 13 insertions, 1 deletions
diff --git a/cpu/access_control/addressing.txt b/cpu/access_control/addressing.txt new file mode 100644 index 0000000..babe667 --- /dev/null +++ b/cpu/access_control/addressing.txt @@ -0,0 +1,8 @@ +Case 1: Full-width address given: + Upper half is used as an index into the gdt, lower half is used as an offset within the segment + +Case 2: Less than full width address given, segment selector specified: + Fills missing bits of a full-width address with the high bits of the specified segment selector, then processes as in case 1 + +Case 3: Less than full width address given, no segment selector specified: + Same as case 2, but uses upper half of IP for instructions implicitly modifying IP, and SS0 otherwise, as the segment selector diff --git a/cpu/registers/pointers.txt b/cpu/registers/pointers.txt index e02db04..ea4d88f 100644 --- a/cpu/registers/pointers.txt +++ b/cpu/registers/pointers.txt @@ -2,10 +2,14 @@ IP (Instruction Pointer) Pointer to the current instruction being executed It is not directly affected by OR - Read-only, can be set by certain jump instructions + Can be used as a segment selector, only top half is used for this purpose SP (Stack Pointer) Pointer to the bottom of the stack (grows down) (used implicitly by push/pop instructions) BP (Base Pointer) Pointer to the top of the stack (grows down) (used implicitly by push/pop instructions) + +TODO: define n +SS0 to SS<n> (Segment Selector n) + Half-width registers used for addressing purposes |