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| author | Test_User <hax@andrewyu.org> | 2023-06-14 04:04:22 -0400 |
|---|---|---|
| committer | Test_User <hax@andrewyu.org> | 2023-06-14 04:04:22 -0400 |
| commit | cdcb701aa48a974f97df31438f32071b3001ac7b (patch) | |
| tree | f4b2ca636b5745e37fb362af2c3d9f511ecf5b1d /cpu/instructions/execution_control | |
| parent | 523518b60efde6a605a8fbc33f14f9924fd08d69 (diff) | |
| download | specification-cdcb701aa48a974f97df31438f32071b3001ac7b.tar.gz specification-cdcb701aa48a974f97df31438f32071b3001ac7b.zip | |
Add a bunch of fewer-parameter versions of instructions, specify that special returns only take effect after other writes complete
Diffstat (limited to 'cpu/instructions/execution_control')
| -rw-r--r-- | cpu/instructions/execution_control/iretde.txt | 2 | ||||
| -rw-r--r-- | cpu/instructions/execution_control/irete.txt | 2 | ||||
| -rw-r--r-- | cpu/instructions/execution_control/ireth.txt | 2 | ||||
| -rw-r--r-- | cpu/instructions/execution_control/irett.txt | 2 | ||||
| -rw-r--r-- | cpu/instructions/execution_control/ret.txt | 10 | ||||
| -rw-r--r-- | cpu/instructions/execution_control/tret.txt | 2 |
6 files changed, 20 insertions, 0 deletions
diff --git a/cpu/instructions/execution_control/iretde.txt b/cpu/instructions/execution_control/iretde.txt index 9e13fa5..9f1ed76 100644 --- a/cpu/instructions/execution_control/iretde.txt +++ b/cpu/instructions/execution_control/iretde.txt @@ -10,5 +10,7 @@ Effect: PR is set to OPRDE Will be considered to be in the previous exception handler + Only takes effect after all other writes are complete + Exceptions: `Invalid operation` if not currently executing a double excetion handler diff --git a/cpu/instructions/execution_control/irete.txt b/cpu/instructions/execution_control/irete.txt index 273ea59..c057344 100644 --- a/cpu/instructions/execution_control/irete.txt +++ b/cpu/instructions/execution_control/irete.txt @@ -10,5 +10,7 @@ Effect: PR is set to OPRE No longer considered to be in an exception handler + Only takes effect after all other writes are complete + Exceptions: `Invalid operation` if not currently executing an excetion handler diff --git a/cpu/instructions/execution_control/ireth.txt b/cpu/instructions/execution_control/ireth.txt index 54c92c8..955e1d3 100644 --- a/cpu/instructions/execution_control/ireth.txt +++ b/cpu/instructions/execution_control/ireth.txt @@ -10,5 +10,7 @@ Effect: PR is set to OPRH Hardware interrupts are allowed again + Only takes effect after all other writes are complete + Exceptions: `Invalid operation` if not currently executing a hardware interrupt diff --git a/cpu/instructions/execution_control/irett.txt b/cpu/instructions/execution_control/irett.txt index 0ee81f0..4289420 100644 --- a/cpu/instructions/execution_control/irett.txt +++ b/cpu/instructions/execution_control/irett.txt @@ -6,6 +6,8 @@ Usage: Effect: See ../../task_switching/execution.txt + Only takes effect after all other writes are complete + Exceptions: `Invalid operation` if not in an exception/interrupt handler diff --git a/cpu/instructions/execution_control/ret.txt b/cpu/instructions/execution_control/ret.txt new file mode 100644 index 0000000..cb3a1a2 --- /dev/null +++ b/cpu/instructions/execution_control/ret.txt @@ -0,0 +1,10 @@ +Number of parameters: 0 + +Usage: + ret + +Effect: + Same as `pop IP` + +Exceptions: + None diff --git a/cpu/instructions/execution_control/tret.txt b/cpu/instructions/execution_control/tret.txt index 7b2cd9d..53b1097 100644 --- a/cpu/instructions/execution_control/tret.txt +++ b/cpu/instructions/execution_control/tret.txt @@ -6,6 +6,8 @@ Usage: Effect: See ../../task_switching/execution.txt + Only takes effect after all other writes are complete + Exceptions: `Invalid operation` if not the original task |